View source for Final PCB Error Checklist

The following is a collection of errors that have previously been made in SSI [[PCB|PCBs]]. It is presented here so that future boards have a list of errors to check for, to avoid fates ranging from embarrassment to system failure. '''It is encouraged that all SSI PCB designers check through this list prior to generating design files for a board.'''

{| class="wikitable" style = "width:100%"
{{red-header|columns=5|size = 110}}SSI Hall of Coaster-makers
|-
|'''Category'''
|'''Error'''
|'''Description'''
|'''Solution'''
|'''Notable Entrant'''
|-
|rowspan="2"|Schematic Errors
|Inconsistent Net Naming
|When two nodes must be electrically connected but aren't visually connected in the schematic by a single wire, naming their nets two different things and causing there to be no connection, leading to a trace not being placed
|Check ICs to make sure all pins are routed or appropriately not connected
|Sasha Maldonado, on ValBal Generation IV, where the chip select for an SD card was labeled "SDCS" at one point and "CS" at another
|-

|Wires and Pins Not Aligned On Grid
|Improperly setting the snap grid in the schematic editor, such that wires and pins can appear connected at a quick glance but not actually be connected, leading to a trace not being placed 
|Check ICs to make sure all pins are routed or appropriately not connected. Avoid setting the schematic editor snap grid to anything other than 10 [units]
|Kirill Safin, on HAB Main Avionics PoS1, where a number of pins appeared connected but were very much not
|}

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