Stanford SSI Wiki

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Gen 2 Architecture (view source)

Revision as of 19:50, 21 June 2017

9 bytes removed ,  19:50, 21 June 2017
→‎Power Bus
Line 62: Line 62:  
=== Power Bus ===
 
=== Power Bus ===
 
{| class="wikitable"
 
{| class="wikitable"
−
|+Power Bus Pinout
+
|Power Bus Pinout
 
|-
 
|-
−
|+3.3V
+
|3.3V
−
|+5V
+
|5V
−
|+VBATT
+
|VBATT
−
|+VADJ
+
|VADJ
 
|GND
 
|GND
 
|-
 
|-
−
|+3.3V
+
|3.3V
−
|+5V
+
|5V
−
|+VBATT
+
|VBATT
−
|+1.8V
+
|1.8V
 
|GND
 
|GND
 
|}
 
|}
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