Gen 2 Architecture

HONEY
HONEy.jpg
Chief Designer Kirill Safin
Technology Line Balloons Core Architecture
Version Generation II
Name HONEY
Missions SSI-52 onward


HONEY (Hardware Optimized Nested Electronics sYstem) is the second generation Core Flight Architecture, designed by HABEES. The HONEY architecture makes significant changes and improvements on the Generation I Architecture, including changes in physical dimensioning, stacking connectors, common power and data buses, and more.

The HONEY specification is outlined below in exhaustive detail, and the bottom of the page lists implementations required by any board utilizing the HONEY architecture.

Physical Specifications

The HONEY architecture physical specifications comprise two categories: board specifications and stack specifications.

Board Specification

All boards implementing the HONEY spec must meet strict physical requirements. There is a standardized set of measurements, mounting holes, connector placements, and board dimensions that must be met for proper integration with the flight stack.

The dimensions of a HONEY-compliant board are exactly 10x10 cm. Boards are 0.062" in thickness (this is important for the physical fastening of the flight stack to the payload container, which is sensitive to the thicknesses of boards in the flight stack. Boards also have four through-holes at each corner, designated for standoffs. The holes are designed for M3 standoffs, which are indented 250 mil from both edges of the respective corner. The board also necessarily consists of a PC/104+ connector for the flight stack data bus, a 10-pin (5x2) connector for the flight stack power bus, a 6-pin (3x2) connector for the flight stack CAN bus, and an 8 pin (4x2) connector (NON stack through) for holding jumpers for implementing CAN terminating impedances. These connectors are not physically located on the board in a whole-number fashion, but must be implemented with exact precision to allow for proper stack-through ability. The PC/104+ connector also comes with a paired shroud that clips onto the board via four through-holes, which, while not strictly required for operation, is highly encouraged and is part of the stack-up Altium part. Boards are expected to not exceed their boundaries by more than 0.25". The flight stack has 0.5" of space around it, between its outer dimensions and the walls of the payload container.

The connectors and hardware used in each case are:

  • Data Bus: Harwin M22-6003005
  • Data Bus Shroud: Harwin M22-6043098
  • Power Bus: Samtec ESQ-105-38-G-D-LL
  • CAN Bus: Samtec ESQ-103-38-G-D-LL
  • CAN Jump Holder: Samtec TSW-104-07-G-D
  • CAN Terminating Jumper: Samtec SNT-100-BK-T
  • Stack Standoffs: Harwin R6104-02

The physical footprint of a HONEY base-board can be found in the Altium library as "HABEES STACKUP" -- this features both a compliant and properly dimensioned PCB PCB, as well as a schematic symbol for accessing the power, data, and CAN buses.

Stack Specification

The HONEY architecture is defined by a flight stack, comprised of stacked HONEY-compliant boards, with common data, power, and CAN buses, physically integrated through a series of four corner standoffs. Flight boards in the flight stack are inter-connected by the standoffs mentioned above (Harwin R6104-02 standoffs). Boards are expected to be 0.062" thickness.

The flight-stack is compromised of two primary divisions: Flight Critical Components (FCC) and Flight Tertiary Components (FTC). At time of writing, there are only two FCC's -- the Core Avionics and the Core BMS. All other boards, non-essential to flight operation, are considered FTC. Components are categorized and assessed as FCC or FTC upon design and implementation on a rolling basis. A flight-ready flight-stack must consist of at least one of each of the Flight Critical Components, and can include zero or any number of Tertiary Flight Components.

As of writing, The FCC (Avionics & BMS) are specified by the HONEY spec as being the strictly top-most and strictly bottom-most boards in the flight stack, with all FTC in-between. This is the case for two reasons: Core Avionics required a clear view of the sky for proper Iridium & GPS reception, and therefore must be on the top of the stack. The BMS holds four 18650 Li-Ion cells on its bottom, and the standard inter-board spacing is insufficient to fit the battery pack. it is therefore allocated to the bottom of the stack, which is fastened to the payload container by longer standoffs to accommodate the battery pack size.

The flight stack is therefore comprised of a minimum of two boards, and can theoretically be any defined height. Currently, a flight stack of five boards is categorized as a "1U flight-stack" for payload-integration purposes. An additional sixth board results in a 2U flight stack, an eleventh board results in a 3U flight stack, and so on.

As defined by the current spec, the physical stack dimensioning is as so:

  • XY-Board Dimensions: 10x10 cm
  • Z-Board Thickness: 0.062"
  • Permissible Extension outside of Board Dimensions: 0.25"
  • Maximum spacing outside of Board Dimensions: 0.5"
  • Inter-Board spacing: 15.24mm, as defined by the Harwin R6104-02 standoff.
  • BMS-Payload Base spacing: 25mm, as defined by McMaster 94868A013, 10/12mm standoffs (McMaster 92005A120, 92005A122)
  • Avionics-Roof spacing: Variable, depending on stack height.

Avionics-Roof spacing, by stack height:

  • 2-Boards (Base Stack): 51mm spacing, 60mm fixture bolt. (McMaster 94669A127, 92005A140)
  • 3-Boards (Base + 1 FTC): 35mm spacing, 45mm fixture bolt. (McMaster 94669A121, 92005A136)
  • 4-Boards (Base + 2 FTC): 16mm spacing, 30/25mm fixture bolt. (McMaster 94669A111, 92005A132, 92005A130)
  • 5-Boards (Base + 3 FTC): 25mm spacing, same as BMS. (McMaster 94868A013, 92005A120, 92005A122)

Electrical Specifications

The HONEY architecture defines pinouts for the various bus connectors, as well as pins required for implementation and auxiliary pins one can use on a given stack-board. The pinouts for the various buses are as follows:

Power Bus

3.3V 5V VBATT VADJ GND
3.3V 5V VBATT 1.8V GND

Data Bus

GND GND GND GND
VBCKP R_MCU R_ALL S_READY
LOW_PWR FMODE SYS_F3 SYS_F4
SYS_F5 SYS_F6 SDA SCL
MOSI MISO SCLK VA_PWM
CHIRP RX2 TX4 RX4
TX6 RX6 DAC0 DAC1
IO/1 IO/2 IO/3 IO/4
IO/5 IO/6 IO/7 IO/8
RESERVED IO/10 IO/11 IO/12
IO/13
RESERVED CAN_SPD