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Releasing a Board for Manufacture (view source)
Revision as of 09:00, 8 October 2018
, 09:00, 8 October 2018Finished DfM section
The first step in getting your board ordered is a manufacturability check, to verify you have all of the required files and the manufacturer can read them and actually make the board they describe. Bay Area Circuits (BAC) has a Design for Manufacturability (DfM) tool that automatically reads and interprets fabrication ZIPs to make sure the boards have a full set of files and can be built. Go to the [http://instantdfm.bayareacircuits.com InstantDfM] page and follow the instructions to upload your fabrication ZIP. Once you submit, you'll have to wait usually around 10 minutes (shorter for simpler boards, longer for more complicated/four-layer boards) for processing. You'll be emailed a link when your board has finished being evaluated. The link will go to a page like the first below:
The first step in getting your board ordered is a manufacturability check, to verify you have all of the required files and the manufacturer can read them and actually make the board they describe. Bay Area Circuits (BAC) has a Design for Manufacturability (DfM) tool that automatically reads and interprets fabrication ZIPs to make sure the boards have a full set of files and can be built. Go to the [http://instantdfm.bayareacircuits.com InstantDfM] page and follow the instructions to upload your fabrication ZIP. Once you submit, you'll have to wait usually around 10 minutes (shorter for simpler boards, longer for more complicated/four-layer boards) for processing. You'll be emailed a link when your board has finished being evaluated. The link will go to a page like the first below:
<gallery mode="slideshow" widths=750px>
<gallery mode="slideshow" widths=750px>
File:InstantDfMfail.png|DfM missing a file and failing manufacturability checks.
File:InstantDfMfail.png|DfM missing a file and failing manufacturability checks.
</gallery>
</gallery>
The goal is to always be within BAC's standard capabilities - this minimizes the risk of manufacturing errors and shortens production time. Small deviations (like the 0.01 mil deviation shown) come from rounding errors during the Altium export process and can be safely ignored. If truly necessary, features requiring the advanced capabilities can be produced; however this should be avoided if possible.
The second image in the above slideshow shows a failing DfM check. There are two major issues: first, no board outline file was included in the fabrication ZIP, meaning that BAC doesn't know what shape of board to cut. Errors like this are easy to fix by uploading a new ZIP file with all of the required files and running DfM again. Second, a hole on an inner layer does not have a copper ring, meaning that a trace on that layer won't make a good electrical connection to the hole. This is a serious issue that needs to be fixed in the design before the board is manufactured.
If your board meaningfully fails DfM for design reasons, you will need to fix the error in Altium and then repeat the outjob and DfM process. This can take some time, particularly if there are multiple issues, so make sure to budget time for DfM ('''especially the first time you release a board'''). In industrial applications, for complicated boards, it's not unheard of for a design team to spend a week verifying manufacturability; SSI designs usually pass within a few hours, and less than an hour if there are no serious problems on the first attempt.
Once you have a ZIP that passes DfM, download the InstantDfM PDF report and add it into your fabrication ZIP (to show BAC that a passing DfM was run on that board). Commit that final ZIP to the SVN, and then message {{slack-channel|altium}} asking for your board to be released and with a link to your ZIP. The SSI BAC contact will give your board a final once-over and then send it out for manufacture - either that same day or as part of the next batch. Once that's done, your board is out of your hands! It'll be back in your hands in physical form in about a week. Congratulations!
=== Ordering Components ===
=== Ordering Components ===
=== Ordering a Stencil ===
=== Ordering a Stencil ===